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MC74HCT14A Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs
High-Performance Silicon-Gate CMOS
The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high-speed CMOS inputs. The HCT14A is identical in pinout to the LS14. The HCT14A is useful to "square up" slow input rise and fall times. Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds applications in noisy environments.
http://onsemi.com MARKING DIAGRAMS
14 PDIP-14 N SUFFIX CASE 646 MC74HCT14AN AWLYYWW 1 14 SOIC-14 D SUFFIX CASE 751A 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week HCT14A AWLYWW
* * * * * * *
Output Drive Capability: 10 LSTTL Loads TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 A In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
A1 1 2 Y1
PIN ASSIGNMENT
A1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC A6 Y6 A5 Y5 A4 Y4
A2
3
4
Y2
Y1 A2
A3
5
6
Y3 Y=A
Y2 A3
A4
9
8
Y3 GND
Y4 PIN 14 = VCC PIN 7 = GND
A5
11
10
Y5
A6
13
12
Y6
ORDERING INFORMATION FUNCTION TABLE
Input A L H Output Y H L Device MC74HCT14AN MC74HCT14AD MC74HCT14ADR2 Package PDIP-14 SOIC-14 SOIC-14 Shipping 2000 / Box 55 / Rail 2500 / Reel
(c) Semiconductor Components Industries, LLC, 1999
1
March, 2000 - Rev. 7
Publication Order Number: MC74HCT14A/D
MC74HCT14A
II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I II I I I I I I I IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII IIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII IIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII I I I I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIII I I II II I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII I I I I IIIIIIIIIII IIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII III I I I IIIIIIIIIIIIIIIIIIIIIII II I I II I I IIIIIIIIIIIIIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIII II I II I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII II I
III II I I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II III II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIII II I III II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIII
MAXIMUM RATINGS*
Symbol VCC Vin Parameter Value Unit V V V DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) - 0.5 to + 7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 20 25 50 750 500 Vout Iin DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA mA mA Iout DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Storage Temperature Plastic DIP SOIC Package mW Tstg TL - 65 to + 150 260
_C _C _C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
v
v
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions Derating -- Plastic DIP: - 10 mW/_C from 65_ to 125_C SOIC Package: - 7 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter Min 4.5 0 Max 5.5 Unit V V DC Supply Voltage (Referenced to GND)
Vin, Vout TA
DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1)
VCC
- 55 --
+ 125
_C
tr, tf
*No Limit when Vin
[ 50% VCC, ICC > 1 mA.
*III ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Temperature Limit
Symbol
Parameter
Test Conditions
VCC Volts 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5
- 55 to 25_C
v 85_C
v 125_C
Min
Max 1.9 2.1
Min
Max 1.9 2.1
Min
Max 1.9 2.1
Unit V V
VT+ max VT+ min
Maximum Positive-Going Input Threshold Voltage Minimum Positive-Going Input Threshold Voltage
Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A
v v v v v v
Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A Vout = 0.1 V or VCC - 0.1 V |Iout| 20 A Vin < VT-min |Iout| 20 A
1.2 1.4
1.2 1.4
1.2 1.4
VT- max VT- min VH max VH min VOH
Maximum Positive-Going Input Threshold Voltage Minimum Positive-Going Input Threshold Voltage Maximum Hysteresis Voltage Minimum Hysteresis Voltage
1.2 1.4
1.2 1.4
1.2 1.4
0.5 0.6
0.5 0.6
0.5 0.6
1.4 1.5
1.4 1.5
1.4 1.5
0.4 0.4 4.4 5.4
0.4 0.4 4.4 5.4
0.4 04 4.4 5.4 3.7
Minimum High-Level Output Voltage
v v
V
Vin < VT-min |Iout| 4.0 mA
3.98
3.84
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D). (continued)
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II II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I II I I IIIII II I I I I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I II I I I II I I IIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I I I I II I I II II I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIII I I III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII I I II I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I II I I I I I I I IIIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I I II II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
* Used to determine the no-load dynamic power consumption: P D = C PD V CC 2 f + I CC V CC . For load considerations, see Chapter 2 of the Motorola High-Speed CMOS Data Book (DL129/D).
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
DC CHARACTERISTICS (Voltages Referenced to GND) - continued
Symbol
Symbol
tPLH, tPHL
tTLH, tTHL
ICC
CPD
VOL
ICC
Iin
OUTPUT Y
2.7 V INPUT A 1.3 V 0.3 V
Power Dissipation Capacitance (Per Inverter)*
Maximum Output Transition Time. Any Output
Maximum Propagation Delay, Input A to Output Y (L to H)
Additional Quiescent Supply Current
Maximum Quiescent Supply Current (per package)
Maximum Input Leakage Current
Maximum Low-Level Output Voltage
Parameter
Figure 1. Switching Waveforms
Parameter
tTLH
90% 1.3 V 10%
tPLH
tf
Vin = 2.4 V, Any One Input Vin = VCC or GND, Other Inputs lout = 0 A
Vin = VCC or GND Iout = 0 A
Vin = VCC or GND
Vin VT+max |Iout| 4.0 mA
Vin VT+max |Iout| 20 A
VCC = 5.0 V 10% CL = 50 pF, Input tr = tf = 6.0 ns
VCC = 5.0 V 10% CL = 50 pF, Input tr = tf = 6.0 ns
tTHL
v
v
Test Conditions
tPHL
Test Conditions
tr
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MC74HCT14A
GND
3V
3 VCC Volts 5.5 5.5 5.5 4.5 4.5 5.5 Fig. 1&2 Fig. 1&2 Min Min - 55 to 25_C - 55 to 25_C *Includes all probe and jig capacitance 0.1 0.26 Max 1.0 0.1 0.1 Typical @ 25C, VCC = 5.0 V Max - 55_C 15 32 DEVICE UNDER TEST 2.9 Temperature Limit Guaranteed Limit Min Min
Figure 2. Test Circuit
v 85_C
v 85_C
32
1.0
0.33
Max
0.1 0.1
OUTPUT Max 10 19 40 25_C to 125_C 2.4 TEST POINT Min Min
v 125_C
v 125_C
CL* 1.0 Max Max 0.4 0.1 0.1 40 22 48 Unit Unit mA A A pF ns ns V
MC74HCT14A
PACKAGE DIMENSIONS
PDIP-14 N SUFFIX CASE 646-06 ISSUE L
14 8
B
1 7
NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01
A F C N H G D
SEATING PLANE
L
J K M
SOIC-14 D SUFFIX CASE 751A-03 ISSUE F
-A-
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
-B-
1 7
P 7 PL 0.25 (0.010)
M
B
M
G C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
M
K TB
S
M A
S
J
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
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Notes
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Notes
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Notes
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MC74HCT14A
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MC74HCT14A/D

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